1. Field of the Invention
The present invention relates to flash memory technology, and more particularly to techniques for managing data in block-based flash memory devices.
2. Description of Related Art
Electrically Erasable Programmable Read-Only Memory (EEPROM) and flash memory include memory cells that store charge between the channel and gate of a field effect transistor. The charge stored affects the threshold voltage of the transistor, and the changes in threshold voltage due to the stored charge can be sensed to indicate data stored in the memory cell. One type of charge storage cell is known as a floating gate memory cell, which stores charge on an electrically conductive layer between the channel and gate. Another type of charge storage cell is referred to as a charge trapping memory cell, which uses a dielectric layer in place of the floating gate.
The term “program” as used herein refers to an operation which increases the threshold voltage of the transistor. The term erase as used herein refers to an operation which decreases the threshold voltage of the transistor. Further, the term “write” as used herein describes an operation which changes the threshold voltage of the transistor, and is intended to encompass the operations for increasing and for decreasing the threshold voltage of the transistor.
In an EEPROM device the memory cells can be both programmed and erased on a byte-by-byte basis, independent of the other data bytes. However, to enable the programming and erasing on a byte-by-byte basis, the memory density of EEPROM is relatively low.
Flash memory typically provides higher memory density than EEPROM. In a flash memory device the memory cells can be programmed on a byte-by-byte basis. However, because of the configuration of the flash memory cells, erasing is performed on a much larger sector-by-sector basis, where each sector includes a relatively large number of bytes. Therefore, in order to erase a memory cell in a sector, all the memory cells in that sector must also be erased. In other words, flash memory offers programming on a byte-by-byte basis, but does not offer erasing on a byte-by-byte basis as is provided by EEPROM.
EEPROM and flash memory devices are often used for different applications. Generally, because of its higher density, flash memory is more economical than EEPROM in mass data storage applications. EEPROM is commonly used in applications where programming and erasing small amounts of data on a byte-by-byte basis is desired.
A variety of electronic devices also include both EEPROM and flash memory, in order to fulfill the different memory performance requirements for the various functions of the device. However, using both of these types of memory increases the cost and complexity of the device.
Because flash memory does not offer erase on a byte-by-byte basis, writing updated data to a sector can be done by performing a sector erase operation to erase all the memory cells in that sector, and then writing the updated data into that sector. A drawback to this process is that all the memory cells in that sector experience a cycle count, even though data may only be changed in some of the memory cells in that sector. This process is also slow.
A specific issue arising in flash memory is limited endurance, the number of erase and/or program cycles over which the cells in the device remain operative and reliable. Thus repeated and frequent writes to a single sector, or a small number of sectors, will result in some of the sectors becoming defective in a relatively short time.
Various “wear-leveling” techniques have been proposed for extending the lifetime of flash memory. One wear-leveling approach involves the use of counters to track the number of times each sector is erased. The counters are then used to alter the mapping of data into the various sectors, to even out their wear. See, for example, U.S. Pat. Nos. 6,000,006; 5,485,595; and 5,341,339.
Although the use of counters can extend the lifetime of flash memory devices, the problem of limited read/write endurance continues to preclude the use of flash memory in applications requiring a large number of program and erase operations.
Another wear-leveling approach is to write updated data to an unused physical location in the flash memory device, rather than overwriting old data in the original location. This reduces the number of sector erase operations for a given number of write operations to the flash memory device. See, for example, U.S. Pat. Nos. 5,845,313; and 6,115,785.
In order to track the changes in the physical locations of the data, a programmable mapping or address translation table can be used. The programmable mapping table stores mapping information between the logical addresses specified by an external system and the actual physical addresses of the flash device containing valid data. In order to accurately track the physical locations of valid data, the programmable mapping table is updated during operation.
To ensure that valid data is preserved, the mapping information must be preserved when power is no longer being supplied. However, since the programmable address translation is continuously being updated, storing the mapping information in the flash memory reduces the life of the device. This can also significantly impact the performance of a system utilizing flash memory, due to the relatively slow erase cycle of the flash memory. The programmable mapping table may alternatively be stored in another non-volatile memory circuit on the flash device. However, this increases the cost and complexity of the flash device.
It is therefore desirable to provide flash memory devices which emulate programming and erasing on a byte-by-byte basis as provided by EEPROM, while also addressing the issue of endurance with reduced complexity and cost.